Measurement and Modeling of Short-Channel MOS Transistor Gate Capacitances

A flexible electrometer method for measuring the gate capacitances of smafl-geometry MOS transistors is described. This technique applies to standard test transistors without requiring any on-chip circuitry. Subfemtofarad accuracy and high resolution (better than 0.1 fF) have been achieved. This technique permits flexibility with regard to choices of dc biases and test devices and provides a good means of monitoring capacitance changes in the device reliability studies. The measnred gate capacitances show prominent short-channel effects. A short-channel MOS transistor capacitance model has been developed which takes iuto account the mobility-degradation effect, velocity-saturation effect, bias-dependent fringing-field effect, as well as source-drain series resistance effect. G@ agreement between the measured and modeled results is found. This model can be easily modified for circuit-simulation applications.